Conventionally, while imaging or image data transmitting is being carried out, noise components (noise) such a so-called snow noise, Gaussian noise, or shot noise are mixed in an image signal. For example, in analog TV broadcasting, noise components are mixed in an image signal while the image signal is being transmitted. This is because electric fields used in the analog television broadcasting are generally weak. Similarly, even in a case where an analog video is converted into a digital video and rebroadcast, noise components are mixed in an image signal. Note that this is also true for audio recording or audio data transmitting.
Noise components cause deteriorations in image and sound quality. In order to prevent such deteriorations in image and sound quality, noise reduction circuits (also referred to as noise reducers) for reducing noise components mixed in an image signal and an audio signal have been in widespread use.
For example, a noise reduction circuit as illustrated in FIG. 18, that is, a noise reduction circuit in which a recursive filter using a frame memory is provided, is known to a public as a noise reduction circuit for reducing a noise in a moving image broadcasted on TV or the like. The recursive filter using the frame memory adds a content of a one frame to a content of another frame immediately following the one frame. However, this sometimes causes so-called tailing in a motion part of a moving image.
Also, a median filter, for example, is generally used as a noise reduction circuit. This reduces noise components and thereby prevents the tailing. However, use of the median filter reduces even those signal components of an image signal which are small in amplitude.
Patent Literature 1 discloses a noise reduction circuit that can minimize a distortion in an input signal indicating an image or the like, and reduce noise components mixed in the input signal. To put it briefly, the noise reduction circuit disclosed in Patent Literature 1 decreases the noise components mixed in the received signal, by adding or subtracting a given signal value to or from the input signal depending on a size relationship between a voltage of the input signal indicating the image or the like and a voltage of a signal outputted from a 3-tap type median filter to which the input signal is inputted.
With reference to FIG. 19, the following description will discuss how the noise reduction circuit disclosed in Patent Literature 1 is configured. (a) of FIG. 19 is a block diagram illustrating how the noise reduction circuit is configured. Reference signs in (a) of FIG. 19 are changed from original ones. Otherwise, (a) of FIG. 19 is substantially identical to FIG. 1 of Patent Literature 1.
As illustrated in (a) of FIG. 19, the noise reduction circuit includes a delay circuit 912, a 3-tap median filter 913, a noise level detection circuit 914, a voltage comparison circuit 915, and selection adder and subtracter 916. The noise reduction circuit creates an output signal from an input signal applied across an input terminal TIN, and outputs the output signal from an output terminal TOUT.
The delay circuit 912 causes a delay so as to make up for a delay time of the received signal caused by the 3-tap median filter 913.
The 3-tap median filter 913 functions as a low-pass filter of a kind, so as to cause a change in waveform of an input signal to be flat. Note, however, that the 3-tap median filter 913 has characteristics in which a rising edge or a falling edge of the input signal is maintained. (b) of FIG. 19 illustrates a detail example configuration of the 3-tap median filter 913. As illustrated in (b) of FIG. 19, the 3-tap median filter 913 is a median filter including a plurality of sample delay circuits 911, which are cascade-connected to each other, and a median selection circuit 931.
The noise level detection circuit 914 detects noise components of a line part which has no image signal during a vertical blanking period of an input video signal, and outputs levels of the noise components in form of a direct voltage.
The voltage comparison circuit 915 determines whether a voltage of an output signal E1 outputted from the delay circuit 912 is larger than that of an output signal E2 outputted from the 3-tap median filter 913 or not.
The selection adder and subtracter 916 create a signal by adding or subtracting an output signal E3 outputted from the noise level detection circuit 914 to or from an output signal E1, depending on a result obtained by the determination made in the voltage comparison circuit 915. Specifically, in a case where the voltage of the output signal E1 is larger than that of the output signal E2, the selection adder and subtracter 918 create a subtracted signal (E1-E3) and supply it to the output terminal TOUT. In contrast, in a case where the voltage of the output signal E1 is smaller than that of the output signal E2, the selection adder and subtracter 918 create an added signal (E1+E3) and supply it to the output terminal TOUT. Note that, in a case where the voltage of the output signal E1 is equivalent to that of the output signal E2 (E1=E2), the selection adder and subtracter 918 directly supply the output signal E1 to the output terminal TOUT.
According to the configuration, an input signal is subjected to either subtracting or adding so that a given signal is subtracted from a signal in the input signal in a case where the signal has a voltage of larger than a median or a given signal is added to the signal in the input signal in a case where the signal has a voltage of smaller than the median. This makes it possible to cause decreases in amplitude of noise components mixed in the input signal.